Open Inference Code Narrows the Gap Between Rival AI Chips

DeepSeek released serving software that builds for Huawei accelerators and Nvidia GPUs from one codebase. In China, where boards are scarce and token traffic is rising, that choice could reshape how teams pick hardware—if live traffic backs up the demos.

NextFin News — Chip preference used to be decided before the first line of serving code was written. Teams planned around one vendor’s tools, then asked whether anything else could be made to work. An open inference package from DeepSeek tries to invert that order. Huawei’s Ascend processors and Nvidia’s current data-center GPUs are listed as peer build targets. The same project tree is meant to target both. In the published design, moving a workload between them is closer to flipping a configuration switch than forking the stack.

If that holds up under load, the practical question in Chinese machine rooms changes. Not “Can we port to domestic silicon?” but “Which board can we actually buy, power and fill with paying traffic this quarter?”

Serving is where that question bites. Training still favors deep, mature software ecosystems and tight multi-chip links; the incumbent’s lead there did not vanish with one repository. Inference is blunter. Weights are fixed. Users pay for tokens out the door. Latency, cost per million tokens, uptime and how fully the rack stays busy decide the winner. Alternative accelerators have long looked more plausible in that world than in the training cluster—provided the software stops treating them as afterthoughts.

DeepSeek’s release is aimed at that seam. By putting two hardware families in the same support tier, it lowers the tax on staying flexible when supply tightens. Trade reporting has described heavy ongoing purchases of Nvidia parts by large Chinese internet firms, including products pressed into AI duty beyond pure training SKUs. When deliveries slip, dual-path software is a hedge. New projects can weigh price, lead time and policy constraints inside one operational model instead of rebuilding the stack for each bet.

The marketing claim and the engineering proof are still different documents. Public benchmark tables tied to the release have leaned on Nvidia hardware. Side-by-side figures for Ascend on the same models, batch sizes and latency targets are thinner in the open. The company has also framed the drop as offline inference: useful for measurement and integration, not a full confession of every component a large production fleet needs—cache management across nodes, balancing, the unglamorous control plane. Compiling on two architectures is a start. Surviving peak traffic is the exam.

Incumbents are writing their own answers. Nvidia has been pushing open and semi-open serving layers tuned to its GPUs, iterating toward production-scale orchestration. A software story that equalizes backends invites a software response from the firm that still ships the most sought-after boards.

Further upstream, collaboration chatter around next-generation training chips—joint design work, engineers in the loop, hopes of less reliance on foreign supply—remains a longer cycle. Past rounds of “flagship model meets flagship domestic accelerator” taught the industry to wait for training-run results, not roadmaps.

For now the meaningful change sits in the serving layer. Chinese operators are drowning in demand for inference and negotiating for every available accelerator. Frameworks that refuse to hard-wire a single vendor into the architecture give procurement and platform teams room to maneuver. Whether Ascend occupies that room as a true peer will be settled by watts, milliseconds and invoices—not by the symmetry of a support matrix on a documentation page.

 

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